There are two basic types of transistors, namely Field Effect Transistors (FETs) and bipolar transistors. In general, current is conducted in FETs by charge carriers (e.g., electrons and holes) typically flowing through one type of semiconductor material, either n−type or p−type materials. In bipolar transistors, current passes in series through both n−type and p−type semiconductor materials.
Within the category of FETS, there are two basic types, namely the Metal Oxide Semiconductor (MOS) FET and the Junction FET (JFET). A primary difference between these two types of transistors is that the gate of the MOSFET has a layer of insulating material, typically referred to as gate oxide, between the gate and the other transistor electrodes. Consequently, channel current in a MOSFET is controlled by the application of electric fields across the channel to enhance and deplete the channel region, as operation requires. The gate of the JFET forms a PN junction with the other electrodes of the transistor, which can be reverse biased by the application of a predetermined gate voltage. Thus, the gate PN junction can be utilized to control the channel current by varying the extent of a depletion region to selectively dimension the current-carrying channel.
JFETs are often employed in start-up circuits (e.g., for telecom and datacom equipment in central offices, PBXs, and servers) where a small current (mA) is supplied from a high (e.g., about 100 V) DC. One example of a schematic for a 110V start-up JFET for a telecom device is shown in FIG. 1. The JFET 10 includes a drain 12, a source 16, and a gate 22. The drain 12 is coupled to an input voltage (Vin) 14, the source 16 coupled to a supply voltage (Vdd) 18 and a bypass capacitor 20 via a voltage drop component 21, and the gate 22 is coupled to a gate control 24.
At the beginning of start-up, the gate control 24 provides a low-impedance path between gate 22 and source 16, giving Vgs near zero. This means that the JFET 10 is on and current will flow into the capacitor 20 and also to any load connected to the source terminal 18. In a typical start-up circuit, the load current is small and most of the current flows into the capacitor 20. The capacitor charges, increasing Vdd, which eventually reaches a desired operating value VddOp. At this point, the low-impedance path between gate and source is opened and a second low-impedance path is turned on between gate 22 and ground. These connections have the effect of reverse biasing the gate-source by VddOp volts. If VddOp is greater than the JFET pinch-off voltage, Vp, the JFET will be turned off. If Vp exceeds VddOp, then additional voltage dropping components need to be added in series with the source to increase the magnitude of Vgs, for example diodes or a pnp bipolar transistor.